Speed control of a permanent magnet synchronous motor actuated by a three-phase multi level inverter

Main Article Content

José Antonio Juárez Abad
Beatriz Angélica Aguilar López
Jorge Luis Barahona Avalos

Abstract

This paper presents the design and FPGA embedded implementation of robust controller design to speed tracking problem for a Permanent Magnet Synchronous Motor (PMSM). Then, a linear controller based on the exact static error dynamics passive output feedback (ESEDPOF) is proposed, where the uncertainty estimation is taken into account. The technique of passivity requires knowing the load torque, this is estimated with a traditional reduced-order observer. PMSM is driven by a five levels Three-Phase Cascaded Cell Multi-Level Inverter (3? -CCMLI). The medium-scale field-programmable gate array (FPGA) Spartan-6 XC6SLX9 is used for implementing the ESEDPOF controller, the reduced-order observer, and the multilevel pulse width modulator. The parallel processing provided by these devices allowed to obtain a sampling time of 10us. Simulation and Experimental validation shows an excellent dynamical performance.

Article Details

Section
Scientific Paper
Author Biography

Jorge Luis Barahona Avalos

I received the bachelor's degree in electronics (with honors) and the degree of Master of Science in Electronics Automation Option (Cum Laude) from Autonomous University of Puebla, Mexico in 1996 and 2004 respectively, and the PhD in Electronics (with honors) from Technological University of Mixteca in 2016. My research interests include: - Modeling, analysis and control of Electro-mechanical and Thermoelectric Systems: Thermoelectric Coolers (Peltier), Direct Drive Motors, Robot Manipulators, CD/CD Converters, Smooth Starters for DC/DC-DC motor combinations.

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